论文信息 - Modeling the overshooting effect of multi-input gate in nanometer technologies

Modeling the overshooting effect of multi-input gate in nanometer technologies

With the advent of nanometer age in digital circuits, the overshooting time becomes a dominating component of gate delay for CMOS logic gates. Till now, few researches have focused on the overshooting effect of multi-input gate. Therefore, in this paper, an effective model considering the overshooting effect of multi-input gate is presented. The experimental results using 32nm PTM model reflect that the proposed model is accurate within 3.6% error compared with SPICE simulation results.

Atsushi Kurokawa | Yasuaki Inoue | Li Ding | Minglu Jiang | Zhangcai Huang

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