A 2.0 Vpp Input, 0.5 V Supply Delta Amplifier with A-to-D Conversion
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[1] A. Abidi,et al. A 9b, 1.25ps Resolution Coarse-Fine Time-to-Digital Converter in 90nm CMOS that Amplifies a Time Residue , 2007, 2007 IEEE Symposium on VLSI Circuits.
[2] M. Steyaert,et al. Digital communication systems: the problem of analog interface circuits , 2005, Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..
[3] Michel Declercq,et al. Design and optimization of high voltage analog and digital circuits built in a standard 5 V CMOS technology , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.
[4] Hayg Dabag,et al. High-Voltage-Tolerant Analog Circuits Design in Deep-Submicrometer CMOS Technologies , 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.
[5] Bogdan M. Wilamowski,et al. A low voltage to high voltage level shifter circuit for MEMS application , 2003, Proceedings of the 15th Biennial University/Government/ Industry Microelectronics Symposium (Cat. No.03CH37488).
[6] Atsushi Iwata,et al. A 1 V Low-Noise CMOS Amplifier Using Autozeroing and Chopper Stabilization Technique , 2006, IEICE Trans. Electron..