Helper Transactions : Enabling Thread-Level Speculation via A Transactional Memory System

As multi-core processors become readily available in the market, how to exploit parallelization opportunities to unleash the performance potential has become the utmost concern. Thread-Level Speculation (TLS) has been studied as one such enabling technique to automatically extracting possibly nonconflicting threads for execution in a program. On the other hand, transactional memory (TM) systems have received much attention recently as a promising alternative for parallel programming due to its simplicity. However, its current scope of use is largely limited to the elimination of traditional locks. In this paper, we discuss how TM systems can be extended to enable TLS, thereby significantly extending the usage model of TM systems. Among the many TLS techniques, we discuss a design in-depth to effectively exploit out-of-order procedure fall-through speculation. In this design, speculatively executed transactions gracefully degenerate to helper threads in the worst case scenario.