On the Verification of Memory Management Mechanisms

We report on the design and formal verification of a complex processor supporting address translation by means of a memory management unit (MMU). We give a paper and pencil proof that such a processor together with an appropriate page fault handler simulates virtual machines modeling user computation. These results are crucial steps towards the seamless verification of entire computer systems.

[1]  Wolfgang J. Paul,et al.  Computer architecture - complexity and correctness , 2000 .

[2]  William R. Bevier,et al.  Kit and the short stack , 1989, Journal of Automated Reasoning.

[3]  Farzad Khalvati,et al.  Combining Equivalence Verification and Completion Functions , 2004, FMCAD.

[4]  Jun Sawada,et al.  Processor Verification with Precise Exeptions and Speculative Execution , 1998, CAV.

[5]  George J. Milne,et al.  Correct Hardware Design and Verification Methods , 2003, Lecture Notes in Computer Science.

[6]  Warren A. Hunt,et al.  Microprocessor design verification , 1989, Journal of Automated Reasoning.

[7]  Wolfgang J. Paul,et al.  Towards the Formal Verification of a C0 Compiler: Code Generation and Implementation Correctnes , 2005, SEFM.

[8]  Robert S. Boyer,et al.  A computational logic handbook , 1979, Perspectives in computing.

[9]  Natarajan Shankar,et al.  PVS: A Prototype Verification System , 1992, CADE.

[10]  Daniel Kroening,et al.  Instantiating Uninterpreted Functional Units and Memory System: Functional Verification of the VAMP , 2003, CHARME.

[11]  J. S. Moore,et al.  A Grand Challenge Proposal for Formal Methods: A Verified Stack , 2002, 10th Anniversary Colloquium of UNU/IIST.

[12]  David Aspinall,et al.  Formalising Java's Data Race Free Guarantee , 2007, TPHOLs.

[13]  Daniel Kroening,et al.  Formal verification of pipelined microprocessors , 2001, Ausgezeichnete Informatikdissertationen.

[14]  Mark A. Hillebrand,et al.  On the Correctness of Operating System Kernels , 2005, TPHOLs.

[15]  Toby Walsh,et al.  Automated Deduction—CADE-11 , 1992, Lecture Notes in Computer Science.

[16]  Mark A. Hillebrand,et al.  Address spaces and virtual memory: specification, implementation, and correctness , 2005 .

[17]  William D. Young,et al.  A mechanically verified code generator , 1989, Journal of Automated Reasoning.

[18]  Mark A. Hillebrand,et al.  Dealing with I/O devices in the context of pervasive system verification , 2005, 2005 International Conference on Computer Design.

[19]  J. Strother Moore,et al.  A mechanically verified language implementation , 1989, Journal of Automated Reasoning.

[20]  Christian Jacobi,et al.  Putting it all together – Formal verification of the VAMP , 2006, International Journal on Software Tools for Technology Transfer.