A 0.022 mm 98.5 dB SNDR Hybrid Audio Modulator With Digital ELD Compensation in 28 nm CMOS

This work presents a compact-area hybrid contin- uous-time delta-sigma modulator (CTDSM) with a shared 6 bit asynchronous successive approximation register (ASAR) quan- tizer for audio application. It is implemented in a 28 nm CMOS process. The modulator incorporates an analog integrator and a digital filter. Signal is digitized after the analog first stage and processed digitally thereafter. Only the first stage is left in the analog domain. Because of high integration of digital circuitry, it could benefit from process advancement such as low power consumption and small area. Moreover, the excess loop delay (ELD) is compensated in the digital domain, and the conventional analog local feedback DAC for ELD compensation is no longer needed. In addition, resistive DAC (R-DAC) is adopted for low flicker noise. The measured DR and SNDR in 24 kHz BW are 100.6 dB and 98.5 dB, respectively, while occupying 0.022 mm2 and achieving FOMs (SNDR + 10 log(BW/Power)) of 171.8 dB. Index Terms—Continuous-time delta sigma modulator (CTDSM), asynchronous successive approximation register (ASAR), dynamic element matching (DEM), hybrid modulator, oversampling, digital filter.