Accurate modeling of the influence of back gate bias and interface roughness on the threshold voltage of nanoscale DG MOSFETs

Abstract An accurate 2-D analytical model regarding the influence of back gate bias Vbg on the threshold voltage of double gate (DG) MOSFETs for a wide range of geometric dimensions and gate materials is presented. The threshold voltage Vt and its variation have been determined with different geometric dimensions taking into account several effects such as quantum mechanical effects and the surface roughness effect for various back gate bias conditions. Our theoretical calculations rely on the solution of 2-D Poisson’s equation while numerical simulation results are obtained from the numerical device simulator ATLAS. The shift in Vt due to quantum effects and the surface roughness-induced effect has been calculated by employing the accurate value of ground state energy computed using variational approach for a finite rectangular quantum well as exists in a real DG MOS structure. Our investigations show that Vt increases with increasing negative Vbg and exhibits significant enhancement due to quantum effects and the surface roughness effect particularly for channel thickness below 5 nm. The margin of accuracy has been verified by comparing our analytical and simulation results with reported simulation and experimental data for various devices.

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