Testability properties of acyclic structures and applications to partial scan design

It is well known that acyclic sequential structures are considerably easier to test than cyclic sequential circuits. Hence some partial scan techniques attempt to simplify the test generation problem by ensuring that the portion of the circuit effectively under test is acyclic. In such designs the test time is dominated by the shifting of test patterns into and out of the scan path. The authors present a compacting technique that minimizes the number of distinct test patterns required to detect an arbitrary fault, thus minimizing the amount of data shifted in to detect the fault. The technique results in (1) a minimal compacted test schedule and (2) a condensed combinational test generation model, which can be used to generate and apply tests to the circuit in an efficient manner.<<ETX>>