Built-in self-test for GHz embedded SRAMs using flexible pattern generator and new repair algorithm
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[1] John R. Day. A Fault-Driven, Comprehensive Redundancy Algorithm for Repair of Dynamic RAMs , 1984, ITC.
[2] John Day. A Fault-Driven, Comprehensive Redundancy Algorithm , 1985, IEEE Design & Test of Computers.
[3] Yervant Zorian,et al. Built in self repair for embedded high density SRAM , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).
[4] W. Kent Fuchs,et al. Efficient Spare Allocation for Reconfigurable Arrays , 1987 .
[5] Pinaki Mazumder,et al. Testing and Testable Design of High-Density Random-Access Memories , 1996 .
[6] V. K. Agarwal,et al. Built-in self-diagnosis for repairable embedded RAMs , 1993, IEEE Design & Test of Computers.
[7] W. Kent Fuchs,et al. Efficient Spare Allocation in Reconfigurable Arrays , 1986, 23rd ACM/IEEE Design Automation Conference.
[8] Pinaki Mazumder,et al. A novel built-in self-repair approach to VLSI memory yield enhancement , 1990, Proceedings. International Test Conference 1990.
[9] Ad J. van de Goor,et al. Semiconductor manufacturing process monitoring using built-in self-test for embedded memories , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).
[10] Howard Leo Kalter,et al. Processor-based built-in self-test for embedded DRAM , 1998, IEEE J. Solid State Circuits.
[11] Manoj Sachdev. Defect Oriented Testing for CMOS Analog and Digital Circuits , 1997 .
[12] Jeff Brauch,et al. Design of cache test hardware on the HP PA8500 , 1997, Proceedings International Test Conference 1997.