A Novel Low-Cost High-Throughput CAVLC Decoder for H.264/AVC

This paper presents a novel low-cost high-performance CAVLC decoder for H.264/AVC. The proposed CAVLC decoder generates the length of coeff_token and total_zeros symbols with simple arithmetic operation. So, it can be implemented with reduced look-up table. And we propose multi-symbol run_before decoder which has enhanced throughput. It can decode more than 2.5 symbols in a cycle if there are run_before symbols to be decoded. The hardware cost is about 12K gates when synthesized at 125MHz.

[1]  Yu Hen Hu,et al.  Multiple-Symbol Parallel CAVLC Decoder for H.264/AVC , 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

[2]  Faouzi Kossentini,et al.  H.264/AVC baseline profile decoder complexity analysis , 2003, IEEE Trans. Circuits Syst. Video Technol..

[3]  Yong Ho Moon,et al.  An improved coeff_token variable length decoding mehod for low power design of H.264/AVC CAVLC decoder , 2008, 2008 15th IEEE International Conference on Image Processing.

[4]  Duo-Li Zhang,et al.  An improved decoding method of coeff_token element for H.264 CAVLC decoder , 2009, 2009 3rd International Conference on Anti-counterfeiting, Security, and Identification in Communication.

[5]  Yong Ho Moon,et al.  An efficient decoding of CAVLC in H.264/AVC video coding standard , 2005, IEEE Trans. Consumer Electron..

[6]  Yong Ho Moon A New Coeff-Token Decoding Method With Efficient Memory Access in H.264/AVC Video Coding Standard , 2007, IEEE Transactions on Circuits and Systems for Video Technology.

[7]  Gwo Giun Lee,et al.  High-throughput low-cost VLSI architecture for AVC/H.264 CAVLC decoding , 2010 .

[8]  S. K. Nandy,et al.  High Performance VLSI Architecture Design for H.264 CAVLC Decoder , 2006, IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06).

[9]  Tian-Sheuan Chang,et al.  A zero-skipping multi-symbol CAVLC decoder for MPEG-4 AVC/H.264 , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[10]  Yong Ho Moon An Advanced Total_Zeros Decoding Method Based on New Memory Architecture in H.264/AVC CAVLC , 2008, IEEE Transactions on Circuits and Systems for Video Technology.

[11]  Jong-Yeol Lee,et al.  Implementation of area efficient H.264/AVC CAVLC decoder , 2009, 2009 IEEE International Conference on IC Design and Technology.

[12]  Jiun-In Guo,et al.  A novel low-cost high-performance VLSI architecture for MPEG-4 AVC/H.264 CAVLC decoding , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[13]  Jaeseok Kim,et al.  Design of High Speed Cavlc Decoder for H.264/AVC , 2007, 2007 IEEE Workshop on Signal Processing Systems.

[14]  Wu Di,et al.  A VLSI architecture design of CAVLC decoder , 2003, ASICON 2003.

[15]  Chen-Yi Lee,et al.  A new approach of group-based VLC codec system with full table programmability , 2001, IEEE Trans. Circuits Syst. Video Technol..