User evaluation and overview of a visual language for real time image processing on FPGAs

FPGAs are often used for image processing, but existing FPGA design tools lack syntactic constructs for some specialized activities that are important in this field, such as timing, resource handling and scheduling. This forces the developer to work at too low a level and makes it difficult to produce a genuinely hierarchically decomposed design. This paper outlines these deficiencies, as the background for an overview of and justification for each of three views in VERTIPH, a visual programming language for defining image processing algorithms on FPGAs. This updates the overview presented in [1]. The paper then presents the results of two user evaluations of VERTIPH, a pre-implementation paper-based user evaluation which found no major changes were required and a post-(partial)-implementation user evaluation. The latter evaluated the novel parts of the language using participants experienced in the field. The key parts of VERTIPH were found to be useful visualisations for the developers, and the only major problem was the interaction required for defining type-connections between views.