Efficient architecture/compiler co-exploration for ASIPs
暂无分享,去创建一个
[1] Jürgen Teich,et al. A joined architecture/compiler design environment for ASIPs , 2000, CASES '00.
[2] Jürgen Teich,et al. Design space characterization for architecture/compiler co-exploration , 2001, CASES '01.
[3] Nikil D. Dutt,et al. EXPRESSION: a language for architecture exploration through compiler/simulator retargetability , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).
[4] Markus Freericks,et al. Describing instruction set processors using nML , 1995, Proceedings the European Design and Test Conference. ED&TC 1995.
[5] G. Goossens,et al. PROGRAMMABLE CHIPS IN CONSUMER ELECTRONICS AND TELECOMMUNICATIONS , 1996 .
[6] Gert Goossens,et al. Chess: retargetable code generation for embedded DSP processors , 1994, Code Generation for Embedded Processors.
[7] Jürgen Teich,et al. Description and Simulation of Microprocessor Instruction Sets Using ASMs , 2000, Abstract State Machines.
[8] Alfonso Pierantonio,et al. Formal aspects of and development environments for Montages , 1997 .
[9] Heinrich Meyr,et al. Retargeting of compiled simulators for digital signal processors using a machine description language , 2000, DATE '00.
[10] Yuri Gurevich,et al. Evolving algebras 1993: Lipari guide , 1995, Specification and validation methods.
[11] Andreas Fauth. Beyond tool-specific machine descriptions , 1994, Code Generation for Embedded Processors.
[12] Pierre G. Paulin,et al. Flexware: A flexible firmware development environment for embedded systems , 1994, Code Generation for Embedded Processors.