On the FPGA-Based Implementation of a Flexible Waveform from a High-Level Description: Application to LTE FFT Case Study

The Field Programmable Gate Array (FPGA) technology is expected to play a key role in the development of Software Defined Radio (SDR) platforms. To this aim, leveraging the nascent High-Level Synthesis (HLS) tools, a design flow from high-level specifications to Register-Transfer Level (RTL) description can be thought to generate processing blocks that can be reconfigured at run-time. Based on such a flow, this paper describes the architectural exploration of a Fast Fourier Transform (FFT) for Long Term Evolution (LTE) standard. Synthesis results show the tradeoff between reconfiguration time and area that can be achieved with such an approach.

[1]  Dejan Markovic,et al.  Power and Area Minimization of Reconfigurable FFT Processors: A 3GPP-LTE Example , 2012, IEEE Journal of Solid-State Circuits.

[2]  Jean Luc Philippe,et al.  Algorithmic-level Specification and Characterization of Embedded Multimedia Applications with Design Trotter , 2006, J. VLSI Signal Process..

[3]  Jarmo Takala,et al.  Low-power application-specific processor for FFT computations , 2009, 2009 IEEE International Conference on Acoustics, Speech and Signal Processing.

[4]  Olivier Sentieys,et al.  Design Space Exploration in an FPGA-Based Software Defined Radio , 2014, 2014 17th Euromicro Conference on Digital System Design.

[5]  Friedrich Jondral,et al.  Software-Defined Radio—Basics and Evolution to Cognitive Radio , 2005, EURASIP J. Wirel. Commun. Netw..

[6]  J. Tukey,et al.  An algorithm for the machine calculation of complex Fourier series , 1965 .

[7]  Trevor Mudge,et al.  SPEX: A Programming Language for Software Defined Radio , 2006 .

[8]  Mark Cummings,et al.  FPGA in the software radio , 1999, IEEE Commun. Mag..

[9]  Bertrand Le Gal,et al.  Design of multi-mode application-specific cores based on high-level synthesis , 2012, Integr..

[10]  Pedro C. Diniz,et al.  A compiler approach to fast hardware design space exploration in FPGA-based systems , 2002, PLDI '02.

[11]  Jianhao Hu,et al.  Hardware Efficient Mixed Radix-25/16/9 FFT for LTE Systems , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[12]  Olivier Sentieys,et al.  Frame-based modeling for automatic synthesis of FPGA-Software Defined Radio , 2014, 2014 9th International Conference on Cognitive Radio Oriented Wireless Networks and Communications (CROWNCOM).

[13]  Eric Lemoine,et al.  Run time reconfiguration of FPGA for scanning genomic databases , 1995, Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.

[14]  Olivier Sentieys,et al.  A frame-based domain-specific language for rapid prototyping of FPGA-based software-defined radios , 2014, EURASIP J. Adv. Signal Process..

[15]  E. D. Willink,et al.  The waveform description language: moving from implementation to specification , 2001, 2001 MILCOM Proceedings Communications for Network-Centric Operations: Creating the Information Force (Cat. No.01CH37277).