50 Gb/s DFF and decision circuits in InP DHBT technology for ETDM systems

In this paper we present two ICs fabricated in InP DHBT technology and devoted to 43 Gbit/s and over transmission systems: reshaping DFF for the transmitter and decision circuit for the receiver. High quality system operation and ease of insertion in system environment are achieved simultaneously with significant reduction of power consumption. 40 -50 Gb/s measurements are presented.

[1]  Agnieszka Konczykowska,et al.  MSI InP/InGaAs DHBT technology: beyond 40 Gbit/s circuits , 2002, Conference Proceedings. 14th Indium Phosphide and Related Materials Conference (Cat. No.02CH37307).

[2]  Kiyoshi Fukuchi.  Wideband and ultra-dense WDM transmission technologies toward over 10-Tb/s capacity , 2002, Optical Fiber Communication Conference and Exhibit.

[3]  Y. Amamiya,et al.  1.5-V low supply voltage 43-Gb/s delayed flip-flop circuit , 2003, 25th Annual Technical Digest 2003. IEEE Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 2003..

[4]  Y. Kisaka,et al.  Differential precoder IC modules for 20-and 40-Gbit/s optical duobinary transmission systems , 1999, IMS 1999.

[5]  H. Nosaka,et al.  High-input-sensitivity, low-power 43 Gbit/s decision circuit using InP/InGaAs DHBTs , 2002 .

[6]  Wilfried Idler,et al.  High-sensitivity decision circuit in InP/InGaAs DHBT technology and 40─80 Gbit/s optical experiments , 2003 .