A Low-Power CMOS Direct Conversion Receiver With 3-dB NF and 30-kHz Flicker-Noise Corner for

A low-power low flicker-noise receiver front-end for 915-MHz-band IEEE 802.15.4 standard in 0.18- m CMOS tech- nology is implemented. A power-constrained simultaneous noise and input matching low-noise amplifier (LNA) can be achieved by using a conventional inductive degeneration cascode amplifier with an extra gate-source capacitor. In combination with the LNA, a passive mixer showing low noise performance is adopted to convert the RF signal directly to the baseband signal. The mea- sured results show a conversion gain of 30 dB and a noise figure of 3 dB with noise corner frequency of 30 kHz. Two-tone test measurements indicate 5-dBm input third-order intercept point and 45-dBm input second-order intercept point. The RF receiver front-end dissipates 2 mA from a 1.8-V supply.

[1]  Behzad Razavi,et al.  Design considerations for direct-conversion receivers , 1997 .

[2]  Jussi Ryynanen,et al.  A 2-GHz wide-band direct conversion receiver for WCDMA applications , 1999, IEEE J. Solid State Circuits.

[3]  Robert G. Meyer,et al.  Analysis and Design of Analog Integrated Circuits , 1993 .

[4]  G. Knoblinger,et al.  A new model for thermal channel noise of deep submicron MOSFETs and its application in RF-CMOS design , 2000, 2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103).

[5]  Robert W. Dutton,et al.  A noise optimization technique for integrated low-noise amplifiers , 2002, IEEE J. Solid State Circuits.

[6]  T.H. Lee,et al.  A 12 mW wide dynamic range CMOS front end for a portable GPS receiver , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

[7]  Y. Tsividis Operation and modeling of the MOS transistor , 1987 .

[8]  M. E. Valkenburg,et al.  Design of Analog Filters , 2001 .

[9]  E. Klumperink,et al.  Reducing MOSFET 1/f noise and power consumption by switched biasing , 1999, IEEE Journal of Solid-State Circuits.

[10]  Behzad Razavi,et al.  Design of Analog CMOS Integrated Circuits , 1999 .

[11]  I. Vassiliou,et al.  A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN , 2003, IEEE J. Solid State Circuits.

[12]  Trung-Kien Nguyen,et al.  CMOS low-noise amplifier design optimization techniques , 2004, IEEE Transactions on Microwave Theory and Techniques.

[13]  T.H. Lee,et al.  A 1.5 V, 1.5 GHz CMOS low noise amplifier , 1996, 1996 Symposium on VLSI Circuits. Digest of Technical Papers.

[14]  N. Golmie,et al.  Wireless personal area networks , 2001, IEEE Network.

[15]  Pietro Andreani,et al.  Noise optimization of an inductively degenerated CMOS low noise amplifier , 2001 .

[16]  Gyuseong Cho,et al.  High frequency/high dynamic range CMOS VGA , 2000 .

[17]  Behzad Razavi CMOS technology characterization for analog and RF design , 1999 .

[18]  A. Ziel Noise in solid state devices and circuits , 1986 .

[19]  G. Knoblinger,et al.  Thermal channel noise of quarter and sub-quarter micron NMOSFET's , 2000, ICMTS 2000. Proceedings of the 2000 International Conference on Microelectronic Test Structures (Cat. No.00CH37095).

[20]  Lawrence E. Larson Integrated circuit technology options for RFICs-present status and future directions , 1998 .

[21]  Myung J. Lee,et al.  Will IEEE 802.15.4 make ubiquitous networking a reality?: a discussion on a potential low power, low bit rate standard , 2004, IEEE Communications Magazine.

[22]  Behzad Razavi,et al.  RF Microelectronics , 1997 .

[23]  Asad A. Abidi Direct-conversion radio transceivers for digital communications , 1995 .