Stable and efficient reduction of large, multiport RC networks by pole analysis via congruence transformations

A novel technique is presented which employs Pole Analysis via Congruence Transformations (PACT) to reduce RC networks in a well-conditioned manner. Pole analysis is shown to be more efficient than Pade approximations when the number of network ports is large, and congruence transformations preserve the passivity (and thus absolute stability) of the networks. Networks are represented by admittance matrices throughout the analysis, and this representation simplifies interfacing the reduced networks with circuit simulators as well as facilitates realization of the reduced networks using RC elements, A prototype SPICE-in, SPICE-out, network reduction CAD tool called RCFIT is detailed, and examples are presented which demonstrate the accuracy and efficiency of the PACT algorithm.

[1]  Andrew T. Yang,et al.  Stable and efficient reduction of substrate model networks using congruence transforms , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[2]  B. Parlett,et al.  The Lanczos algorithm with selective orthogonalization , 1979 .

[3]  P. Dooren,et al.  Asymptotic Waveform Evaluation via a Lanczos Method , 1994 .

[4]  Roland W. Freund,et al.  Reduced-Order Modeling of Large Linear Subcircuits via a Block Lanczos Algorithm , 1995, 32nd Design Automation Conference.

[5]  J. Gillis,et al.  Matrix Iterative Analysis , 1961 .

[6]  Roy R. Craig,et al.  Krylov vector methods for model reduction and control of flexible structures , 1992 .

[7]  Albert E. Ruehli,et al.  The modified nodal approach to network analysis , 1975 .

[8]  M. M. Alaybeyi,et al.  AWE-Inspired , 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

[9]  W. Arnoldi The principle of minimized iterations in the solution of the matrix eigenvalue problem , 1951 .

[10]  W. Van Petegem,et al.  Electrothermal simulation of integrated circuits , 1990, Sixth Annual IEEE Proceedings Semiconductor Thermal and Temperature Measurement Symposium.

[11]  Lawrence T. Pileggi,et al.  Asymptotic waveform evaluation for timing analysis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[12]  Roland W. Freund,et al.  Efficient linear circuit analysis by Pade´ approximation via the Lanczos process , 1994, EURO-DAC '94.

[13]  C. Lanczos An iteration method for the solution of the eigenvalue problem of linear differential and integral operators , 1950 .

[14]  A. Yang,et al.  Stable and efficient reduction of large, multiport RC networks by pole analysis via congruence transformations , 1996, 33rd Design Automation Conference Proceedings, 1996.

[15]  Andrew T. Yang,et al.  Efficient parasitic substrate modeling for monolithic mixed-A/D circuit design and verification , 1996 .

[16]  Alan George,et al.  Computer Solution of Large Sparse Positive Definite , 1981 .

[17]  N. Higham Review ofMatrix computations: Second edition by G.H. Golub and C.F. Van Loan☆ , 1990 .

[18]  Mattan Kamon,et al.  Efficient Reduced-Order Modeling of Frequency-Dependent Coupling Inductances associated with 3-D Interconnect Structures , 1995, 32nd Design Automation Conference.

[19]  J. Pasciak,et al.  Computer solution of large sparse positive definite systems , 1982 .

[20]  Andrew T. Yang Ivan L. Wemple Mixed-Signal Switching Noise Analysis Using Voronoi-Tessellated Substrate Macromodels , 1995, 32nd Design Automation Conference.

[21]  Robert Skelton,et al.  Model reductions using a projection formulation , 1987, 26th IEEE Conference on Decision and Control.

[22]  A. Gourlay,et al.  Computational Methods for Matrix Eigenproblems , 1973 .

[23]  H. B. Bakoglu,et al.  Circuits, interconnections, and packaging for VLSI , 1990 .

[24]  Christopher C. Paige,et al.  Practical use of the symmetric Lanczos process with re-orthogonalization , 1970 .