Automatic VHDL generation for solving rotation and scale-invariant template matching in FPGA

Template matching is a classical problem in computer vision. It consists in detecting the presence of a given template in a digital image. This task becomes considerably more complex with the invariance to rotation, scale, translation, brightness and contrast (RSTBC). A novel RSTBC-invariant robust template matching algorithm named Ciratefi was recently proposed. However, its execution in a conventional computer takes several seconds. Moreover, the implementation of its general version in hardware is difficult, because there are many adjustable parameters. This paper proposes a software that automatically generates compilable Hardware Description Logic (VHDL) modules that implements Ciratefi in Field Programmable Gate Array (FPGA) devices. The proposed solution accelerates the time to process a frame from 7s (in a 3GHz PC) to 1.06ms. This excellent performance (more than the required for a real-time system) may lead to cost-effective high-performance co-processing computer vision systems.

[1]  César Torres-Huitzil,et al.  FPGA-Based Configurable Systolic Architecture for Window-Based Image Processing , 2005, EURASIP J. Adv. Signal Process..

[2]  Mamoru Nakanishi,et al.  A parallel algorithm for real-time object recognition , 2002, Pattern Recognit..

[3]  César Torres-Huitzil,et al.  Real-time image processing with a compact FPGA-based systolic architecture , 2004, Real Time Imaging.

[4]  Hae Yong Kim,et al.  Grayscale Template-Matching Invariant to Rotation, Scale, Translation, Brightness and Contrast , 2007, PSIVT.

[5]  Anibal Ollero,et al.  Integrated real-time vision system for vehicle control in non-structured environments , 2000 .

[6]  Reinhard Männer,et al.  FPGA-based template matching using distance transforms , 2002, Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

[7]  Konstantinos G. Margaritis,et al.  A Programmable Array Processor Architecture for Flexible Approximate String Matching Algorithms , 2005, ICPP Workshops.

[8]  Meng Ma,et al.  A Sign Bit Only Phase Normalization for Rotation and Scale Invariant Template Matching , 2005 .

[9]  Tom Kean,et al.  A 800 Mpixel/sec reconfigurable image correlator on XC6216 , 1997, FPL.

[10]  Hae Yong Kim,et al.  Rotation, scale and translation-invariant segmentation-free grayscale shape recognition using mathematical morphology , 2007, ISMM.

[11]  Luis Entrena,et al.  High performance FPGA-based image correlation , 2007, Journal of Real-Time Image Processing.

[12]  Vanderlei Bonato.  Proposal of an FPGA hardware architecture for SLAM using multi-cameras and applied to mobile robotics (Proposta de uma arquitetura de hardware em FPGA implementada para SLAM com multi-câmeras aplicada à robótica móvel) , 2008 .

[13]  Huajun Song,et al.  Fast Correlation Tracking Method based on Circular Projection , 2007 .