Part I: High-Voltage MOS Device Design for Improved Static and RF Performance
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Maryam Shojaei Baghini | Dinesh Kumar Sharma | Harald Gossner | Ankur Gupta | Mayank Shrivastava | V. Ramgopal Rao
[1] Umesh K. Mishra,et al. GaN-Based RF Power Devices and Amplifiers , 2008, Proceedings of the IEEE.
[2] Amine Bermak,et al. A high voltage zero-static current voltage scaling ADC interface circuit for micro-stimulator , 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).
[3] J. Scholvin,et al. Fundamental Power and Frequency Limits of Deeply-Scaled CMOS for RF Power Applications , 2006, 2006 International Electron Devices Meeting.
[4] M. Singh,et al. Sources of transconductance collapse in III-V nitrides - consequences of velocity-field relations and source/gate design , 2005, IEEE Transactions on Electron Devices.
[5] Antonio Gnudi,et al. Analysis of HCS in STI-based LDMOS transistors , 2010, 2010 IEEE International Reliability Physics Symposium.
[6] C.A.T. Salama,et al. Optimization of RESURF LDMOS transistors: an analytical approach , 1990 .
[7] Ankur Gupta,et al. A Robust Level-Shifter Design for Adaptive Voltage Scaling , 2008, 21st International Conference on VLSI Design (VLSID 2008).
[8] M. Shrivastava,et al. Part II: A Novel Scheme to Optimize the Mixed-Signal Performance and Hot-carrier Reliability of Drain-Extended MOS Devices , 2010, IEEE Transactions on Electron Devices.
[9] J. Rizk,et al. RF CMOS technology scaling in High-k/metal gate era for RF SoC (system-on-chip) applications , 2010, 2010 International Electron Devices Meeting.
[10] F. Arnaud,et al. Technology-circuit convergence for full-SOC platform in 28 nm and beyond , 2011, 2011 International Electron Devices Meeting.
[11] Maryam Shojaei Baghini,et al. Device–Circuit Co-design for Beyond 1 GHz 5 V Level Shifter Using DeMOS Transistors , 2013, IEEE Transactions on Electron Devices.
[12] Maryam Shojaei Baghini,et al. On the failure mechanism and current instabilities in RESURF type DeNMOS device under ESD conditions , 2010, 2010 IEEE International Reliability Physics Symposium.
[13] B. Szelag,et al. High-Performance 15-V Novel LDMOS Transistor Architecture in a 0.25- $\mu\hbox{m}$ BiCMOS Process for RF-Power Applications , 2007, IEEE Transactions on Electron Devices.
[14] O. Tornblad,et al. Linearity Analysis of Lateral Channel Doping in RF Power MOSFETs , 2009, IEEE Transactions on Microwave Theory and Techniques.
[15] Martin Knaipp,et al. Drift design impact on quasi-saturation & HCI for scalable N-LDMOS , 2011, 2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs.
[16] S. Decoutere,et al. Manufacturing Challenges of GaN-on-Si HEMTs in a 200 mm CMOS Fab , 2013, IEEE Transactions on Semiconductor Manufacturing.
[17] S. Park,et al. The impact of semiconductor technology scaling on CMOS RF and digital circuits for wireless application , 2005, IEEE Transactions on Electron Devices.
[18] P. Gassot,et al. Accumulation region length impact on 0.18µm CMOS fully-compatible lateral power MOSFETs with Shallow Trench Isolation , 2009, 2009 21st International Symposium on Power Semiconductor Devices & IC's.
[19] M. Shrivastava,et al. A Drain-Extended MOS Device With Spreading Filament Under ESD Stress , 2012, IEEE Electron Device Letters.
[20] P. Gassot,et al. Solutions to improve flatness of Id-Vd curves of rugged nLDMOS , 2011, 2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs.
[21] Huailin Liao,et al. A Novel RF LDMOS Fabricated With Standard Foundry Technology , 2009, IEEE Electron Device Letters.
[22] Dajiang Yang,et al. A 65-nm High-Frequency Low-Noise CMOS-Based RF SoC Technology , 2010, IEEE Transactions on Electron Devices.
[23] A. Chin,et al. A CMOS-compatible, high RF power, Asymmetric-LDD MOSFET with excellent linearity , 2008, 2008 IEEE International Electron Devices Meeting.
[24] A. Chatterjee,et al. A Microscopic Understanding of Nanometer Scale DENMOS Failure Mechanism under ESD Conditions , 2007, 2007 IEEE International Electron Devices Meeting.
[25] M. Shrivastava,et al. Part I: Mixed-Signal Performance of Various High-Voltage Drain-Extended MOS Devices , 2010, IEEE Transactions on Electron Devices.
[26] Maryam Shojaei Baghini,et al. Drain extended MOS device design for integrated RF PA in 28nm CMOS with optimized FoM and ESD robustness , 2014, 2014 IEEE International Electron Devices Meeting.