Simulation of Vedic Multiplier in DCT Applications
暂无分享,去创建一个
[1] Arun Khosla,et al. Small area reconfigurable FFT design by Vedic Mathematics , 2010, 2010 The 2nd International Conference on Computer and Automation Engineering (ICCAE).
[2] N. Ahmed,et al. Discrete Cosine Transform , 1996 .
[3] Harpreet S. Dhillon,et al. A Reduced-Bit Multiplication Algorithm for Digital Arithmetic , 2008 .
[4] Natarajan Ahmed. DISCRETE COSINE TRANSFORMS , 2009 .
[5] Dong Sam Ha,et al. Low power design of DCT and IDCT for low bit rate video codecs , 2004, IEEE Transactions on Multimedia.
[6] Trac D. Tran,et al. Fast multiplierless approximation of the DCT with the lifting scheme , 2000, SPIE Optics + Photonics.
[7] Richard Conway,et al. Lifting scheme discrete Wavelet Transform using Vertical and Crosswise multipliers , 2008 .
[8] Liu Feng,et al. Research on Information Hiding System Based on DCT Domain , 2010, 2010 Second International Conference on Computer Modeling and Simulation.
[9] Trac D. Tran,et al. Fast multiplierless approximations of the DCT with the lifting scheme , 2001, IEEE Trans. Signal Process..
[10] Clay S. Gloster,et al. Optimizing the Design of a Configurable Digital Signal Processor for Accelerated Execution of the 2-D Discrete Cosine Transform , 2006, Proceedings of the 39th Annual Hawaii International Conference on System Sciences (HICSS'06).
[11] Manfred Glesner,et al. Flexible architectures for DCT of variable-length targeting shape-adaptive transform , 2000, IEEE Trans. Circuits Syst. Video Technol..