Using problem symmetry in search based satisfiability algorithms
暂无分享,去创建一个
[1] Donald W. Loveland,et al. A machine program for theorem-proving , 2011, CACM.
[2] Robert K. Brayton,et al. Combinational test generation using satisfiability , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[3] Armin Biere,et al. Symbolic Model Checking without BDDs , 1999, TACAS.
[4] Randal E. Bryant,et al. Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic , 1999, TOCL.
[5] Sharad Malik,et al. Chaff: engineering an efficient SAT solver , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[6] Kwang-Ting Cheng,et al. Combinational and sequential logic optimization by redundancy addition and removal , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[7] Sharad Malik,et al. Efficient conflict driven learning in a Boolean satisfiability solver , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).
[8] Hantao Zhang,et al. SATO: An Efficient Propositional Prover , 1997, CADE.
[9] Hilary Putnam,et al. A Computing Procedure for Quantification Theory , 1960, JACM.
[10] Carlos Delgado Kloos,et al. Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.
[11] Joao Marques-Silva,et al. GRASP: A Search Algorithm for Propositional Satisfiability , 1999, IEEE Trans. Computers.
[12] Robert K. Brayton,et al. Propositional satisfiability algorithms in eda applications , 2001 .
[13] Rob A. Rutenbar,et al. FPGA routing and routability estimation via Boolean satisfiability , 1997, FPGA '97.