High hole mobility GeOI pMOSFETs with high-k / metal gate on Ge condensation wafers

In this paper, we report for the first time electrical performances of high hole mobility pMOSFETs with high-k/metal gate using ultra-thin GeOI wafers as templates obtained by the Ge condensation technique. It is concluded that the results coupled with a localized Ge condensation technique, open the way to planar SOI-nMOSFET/GeOI-pMOSFET co-integration.