A Compositional Framework for Hardware/Software Co-Design
暂无分享,去创建一个
M. Manjunathaiah | Hussein Zedan | Antonio Cau | Ben C. Moszkowski | Roger Hale | J. Dimitrov | M. Spivey | H. Zedan | A. Cau | R. Hale | B. Moszkowski | M. Manjunathaiah | Michael Spivey | J. Dimitrov
[1] Flemming Nielson,et al. Principles of Program Analysis , 1999, Springer Berlin Heidelberg.
[2] Wen-Hsiung Chen,et al. A Fast Computational Algorithm for the Discrete Cosine Transform , 1977, IEEE Trans. Commun..
[3] Robert P. Kurshan,et al. Computer-Aided Verification of Coordinating Processes: The Automata-Theoretic Approach , 2014 .
[4] Dana Fisman,et al. The Temporal Logic Sugar , 2001, CAV.
[5] Anne Elisabeth Haxthausen,et al. LYCOS: the Lyngby Co-Synthesis System , 1997, Des. Autom. Embed. Syst..
[6] Paolo Prinetto,et al. A functional approach to formal hardware verification: the MTI experience , 1988, Proceedings 1988 IEEE International Conference on Computer Design: VLSI.
[7] Ben C. Moszkowski,et al. Executing temporal logic programs , 1986, Seminar on Concurrency.
[8] D. Sciuto,et al. System-level performance estimation strategy for sw and hw , 1998, Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273).
[9] Warren A. Hunt. FM8501: A Verified Microprocessor , 1994, Lecture Notes in Computer Science.
[10] Roger William Stephen Hale. Programming in temporal logic , 1988 .
[11] Juha-Pekka Soininen,et al. Cosimulation of real-time control systems , 1995, Proceedings of EURO-DAC. European Design Automation Conference.
[12] M. Manjunathaiah. Design of multi-phase regular arrays , 1999 .
[13] M. F. Bowen. Handel-c language reference manual , 1998 .
[14] He Jifeng,et al. CHAPTER 6 - A Real-time Programming Language , 1994 .
[15] Luciano Lavagno,et al. Hardware-software co-design of embedded systems: the POLIS approach , 1997 .
[16] Ben C. Moszkowski. Some Very Compositional Temporal Properties , 1994, PROCOMET.
[17] M. Gordon,et al. Introduction to HOL: a theorem proving environment for higher order logic , 1993 .
[18] He Jifeng,et al. Formalising VERILOG , 2000, ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.00EX445).
[19] Michael J. C. Gordon,et al. The semantic challenge of Verilog HDL , 1995, Proceedings of Tenth Annual IEEE Symposium on Logic in Computer Science.
[20] Jifeng He,et al. From Operational Semantics to Denotational Semantics for Verilog , 2001, CHARME.
[21] J. Dimitrov. Interval Temporal Logic (ITL) semantics for Verilog , 2000 .
[22] Hussein Zedan,et al. Refining Interval Temporal Logic Specifications , 1997, ARTS.
[23] Ieee Standards Board. IEEE Standard hardware Description language : based on the Verilog hardware description language , 1996 .
[24] Rolf Ernst,et al. Codesign of Embedded Systems: Status and Trends , 1998, IEEE Des. Test Comput..
[25] Jifeng He,et al. An animatable operational semantics of the Verilog hardware description language , 2000, ICFEM 2000. Third IEEE International Conference on Formal Engineering Methods.
[26] Sanjay V. Rajopadhye,et al. Uniformization of affine dependence programs for parallel embedded system design , 2001, International Conference on Parallel Processing, 2001..
[27] Donald E. Thomas,et al. The Verilog® Hardware Description Language , 1990 .
[28] Jozef Hooman,et al. Concurrency Verification: Introduction to Compositional and Noncompositional Methods , 2001, Cambridge Tracts in Theoretical Computer Science.
[29] Ian Page. Constructing hardware-software systems from a single description , 1996, J. VLSI Signal Process..
[30] A Gawthorne. To the gateway , 1992 .
[31] Daniel D. Gajski,et al. Essential Issues in Codesign , 1997 .
[32] Rajesh K. Gupta. Editorial: Special Issue on Hardware/Software Partitioning , 1997, Des. Autom. Embed. Syst..
[33] Yoav Hollander,et al. The e language: a fresh separation of concerns , 2001, Proceedings Technology of Object-Oriented Languages and Systems. TOOLS 38.
[34] Martin Peschke,et al. Design and Validation of Computer Protocols , 2003 .
[35] Jordan Dimitrov. Operational semantics for Verilog , 2001, Proceedings Eighth Asia-Pacific Software Engineering Conference.
[36] Dov M. Gabbay,et al. METATEM: A Framework for Programming in Temporal Logic , 1989, REX Workshop.
[37] Graham M. Megson. Introduction to systolic algorithm design , 1992 .
[38] Vivek Sagdeo. The complete Verilog book , 1998 .
[39] Egon Börger,et al. A formal method for provably correct composition of a real-life processor out of basic components. (The APE100 Reverse Engineering Study) , 1995, Proceedings of First IEEE International Conference on Engineering of Complex Computer Systems. ICECCS'95.
[40] Jim Grundy,et al. Window Inference In The HOL System , 1991, 1991., International Workshop on the HOL Theorem Proving System and Its Applications.
[41] Hussein Zedan,et al. Designing a Provably Correct Robot Control System Using a 'Lean' Formal Method , 1998, FTRTFT.
[42] Donald E. Thomas,et al. The Verilog hardware description language (4th ed.) , 1998 .
[43] Hussein Zedan,et al. A framework for analysing the effect of 'change' in legacy code , 1999, Proceedings IEEE International Conference on Software Maintenance - 1999 (ICSM'99). 'Software Maintenance for Business Change' (Cat. No.99CB36360).