The Piecewise Data Flow Architecture: Architectural Concepts
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[1] Paul Budnik,et al. The Organization and Use of Parallel Memories , 1971, IEEE Transactions on Computers.
[2] Duncan H. Lawrie,et al. The Prime Memory System for Array Access , 1982, IEEE Transactions on Computers.
[3] Richard M. Russell,et al. The CRAY-1 computer system , 1978, CACM.
[4] Wesley W. Chu,et al. Task Allocation in Distributed Data Processing , 1980, Computer.
[5] Gregory L. Zick,et al. The Expression Processor: A Pipelined, Multiple- Processor Architecture , 1981, IEEE Transactions on Computers.
[6] Jack B. Dennis,et al. A preliminary architecture for a basic data-flow processor , 1974, ISCA '75.
[7] Gordon Bell,et al. C.mmp: a multi-mini-processor , 1972, AFIPS '72 (Fall, part II).
[8] Yoichi Muraoka,et al. Measurements of parallelism in ordinary FORTRAN programs , 1974, Computer.
[9] Ian Watson,et al. A prototype data flow computer with token labelling , 1899 .
[10] Jack B. Dennis,et al. Data Flow Supercomputers , 1980, Computer.
[11] Richard M. Brown,et al. The ILLIAC IV Computer , 1968, IEEE Transactions on Computers.
[12] Samuel H. Fuller,et al. Cm*: a modular, multi-microprocessor , 1977, AFIPS '77.
[13] A. Davis. A data flow evaluation system based on the concept of recursive locality* , 1979, 1979 International Workshop on Managing Requirements Knowledge (MARK).
[14] W. J. Watson. The TI ASC: a highly modular and flexible super computer architecture , 1972, AFIPS '72 (Fall, part I).