A spurious-free delta-sigma DAC using rotated data weighted averaging

A new dynamic element matching (DEM) algorithm, referred to as rotated data weighted averaging (RDWA), is implemented in a third-order three-bit delta-sigma DAC with 64 times oversampling and a conversion bandwidth of 25 kHz. The systematic and random errors are considered in the design of the 14-bit linear converter. The 2 /spl mu/m CMOS prototype was designed to test the performance of the DAC without DEM, with data weighted averaging (DWA), and with RDWA. The results show that the new RDWA algorithm is capable of achieving first-order noise shaping while eliminating the signal-dependent harmonic distortion even for DAC component mismatches as large as 15%.