A Reconfigurable Quadrature Oscillator Based on a Direct Digital Synthesis System

We propose an architecture to realize an RF quadrature oscillator, in which a frequency generated by a Direct Digital Synthesis (DDS) system is added to (or subtracted from) the frequency generated by a Phase-Locked Loop (PLL). The DDS system is easily reconfigurable to change the channel spacing and bandwidth, and allows the implementation of several digital modulation schemes. A computer program was developed to calculate the parameters of the DDS system, based on the specifications supplied by the user, and to generate the VHDL code of the digital part of the system. The DDS is designed to obtain outputs in quadrature with a minimum ROM area. The DDS is implemented in a FPGA and has excellent quadrature relation throughout the frequency band of the system.

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