Comparison between RTW VCO and LC QVCO 12 GHz PLLs

This paper reports comparisons between RTW VCO and LC QVCO 12 GHz PLLs, designed in a 130 nm CMOS technology for satellite communication applications. The phase noise at 1 MHz offset from the carrier is −102 dBc/Hz for the RTW VCO PLL and −98 dBc/Hz for the LC QVCO PLL, and the power consumption is 39 and 17 mW, respectively.

[1]  Gilles Jacquemod,et al.  Design and modelling of a multi-standard fractional PLL in CMOS/SOI technology , 2008, Microelectron. J..

[2]  G. Le Grand de Mercey,et al.  A 18GHz rotary traveling wave VCO in CMOS with I/Q outputs , 2003, ESSCIRC.

[3]  Ali M. Niknejad,et al.  A CMOS Ku-band single-conversion low-noise block front-end for satellite receivers , 2009, 2009 IEEE Radio Frequency Integrated Circuits Symposium.

[4]  Iñigo Adin,et al.  Design Methodology for RF CMOS Phase Locked Loops , 2009 .

[5]  Kiyoshi Miyashita A plastic packaged Ku-band LNB with very high susceptibility to supply PLL in 0.18um CMOS , 2010, 2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF).

[6]  Mattia Borgarino,et al.  A 130nm CMOS tunable digital frequency divider for dual-band microwave radiometer , 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

[7]  Yves Leduc,et al.  Modeling and Characterization of the 3rd Order Charge-Pump PLL: a Fully Event-driven Approach , 1999 .

[8]  A.M. Niknejad,et al.  A 1.8-GHz LC VCO with 1.3-GHz tuning range and digital amplitude calibration , 2005, IEEE Journal of Solid-State Circuits.

[9]  Michael M. Green,et al.  High-frequency CML clock dividers in 0.13-/spl mu/m CMOS operating up to 38 GHz , 2005, IEEE Journal of Solid-State Circuits.

[10]  Behzad Razavi,et al.  Design of high-speed, low-power frequency dividers and phase-locked loops in deep submicron CMOS , 1995, IEEE J. Solid State Circuits.

[11]  G. Jacquemod,et al.  Design of a CMOS 12 GHz Rotary Travelling Wave Oscillator with switched capacitor tuning , 2009, 2009 IEEE Radio Frequency Integrated Circuits Symposium.

[12]  A. Rofougaran,et al.  A 900 MHz CMOS LC-oscillator with quadrature outputs , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

[13]  A. Hajimiri,et al.  Design issues in CMOS differential LC oscillators , 1999, IEEE J. Solid State Circuits.

[14]  Salvatore Levantino,et al.  Frequency dependence on bias current in 5 GHz CMOS VCOs: impact on tuning range and flicker noise upconversion , 2002, IEEE J. Solid State Circuits.