An IIP3 enhancement technique for CMOS active mixers with a source-degenerated transconductance stage

In this paper, a new third-order input intercept point (IIP3) enhancement technique is introduced for CMOS active mixers with a source-degenerated transconductance stage. In the proposed technique, the third-order Volterra kernel of the output current of the transconductance stage is significantly attenuated by producing a new interaction term which is in an equal magnitude but an opposite phase related to the stage's total third-order intermodulation (IM3) current. For this end, a second-order intermodulation (IM2) current with an adjustable magnitude and phase is produced and injected to the transconductance stage. The proposed mixer has been designed for IEEE 802.11 applications with input frequency and output bandwidth equal to 2.4GHz and 20MHz, respectively, and simulated using a 90nm RF-CMOS technology. Spectre-RF simulation results reveals that the IIP3 improves about 17.5dB and 18.2dB compared to the conventional mixers with source-degenerated and fully-differential transconductance stages, respectively, while only 1.2mA extra current is drawn from a single 1.2V power supply. In addition, the proposed technique has no effect on other parameters of the mixer such as the noise figure and conversion gain.

[1]  G. G. Stokes "J." , 1890, The New Yale Book of Quotations.

[2]  Yi-Jen Chan,et al.  A New Linearization Technique for CMOS RF Mixer Using Third-Order Transconductance Cancellation , 2008, IEEE Microwave and Wireless Components Letters.

[3]  Mohammad Yavari,et al.  A highly linear mixer with inherent balun using a new technique to remove common mode currents , 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

[4]  Meng Zhang,et al.  A 1.5-V Current Mirror Double-Balanced Mixer With 10-dBm IIP3 and 9.5-dB Conversion Gain , 2012, IEEE Transactions on Circuits and Systems II: Express Briefs.

[5]  Enrico Mach,et al.  FOR LOW POWER , 1997 .

[6]  Tae Wook Kim,et al.  A 0.6-V +4 dBm IIP3 LC Folded Cascode CMOS LNA With gm Linearization , 2013, IEEE Trans. Circuits Syst. II Express Briefs.

[7]  Abdolreza Nabavi,et al.  Low-power highly linear UWB CMOS mixer with simultaneous second- and third-order distortion cancellation , 2010, Microelectron. J..

[8]  Wei Cheng,et al.  A Flicker Noise/IM3 Cancellation Technique for Active Mixer Using Negative Impedance , 2013, IEEE Journal of Solid-State Circuits.

[10]  F. Svelto,et al.  A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers , 2006, IEEE Journal of Solid-State Circuits.

[11]  H. Fukui,et al.  Design of Microwave GaAs MESFET's for Broad-Band Low-Noise Amplifiers , 1979 .

[12]  Heng Zhang,et al.  A Low-Power, Linearized, Ultra-Wideband LNA Design Technique , 2009, IEEE Journal of Solid-State Circuits.

[13]  Tae Wook Kim,et al.  A 6.75 mW $+$ 12.45 dBm IIP3 1.76 dB NF 0.9 GHz CMOS LNA Employing Multiple Gated Transistors With Bulk-Bias Control , 2011, IEEE Microwave and Wireless Components Letters.

[14]  H. G. Han,et al.  +134 dBm IIP3, 0.4-1 GHz common-drain stage with its high frequency analysis , 2012 .

[15]  S. Park,et al.  The impact of semiconductor technology scaling on CMOS RF and digital circuits for wireless application , 2005, IEEE Transactions on Electron Devices.

[16]  Chikuang Yu,et al.  High linearity 23-33 GHz SOI CMOS downconversion double balanced mixer , 2011 .

[17]  Hossein Miar Naimi,et al.  An Improved High Linearity Active CMOS Mixer: Design and Volterra Series Analysis , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

[18]  Tae Wook Kim,et al.  A 5.5-mW ${+}$ 9.4-dBm IIP3 1.8-dB NF CMOS LNA Employing Multiple Gated Transistors With Capacitance Desensitization , 2010, IEEE Transactions on Microwave Theory and Techniques.

[19]  R.G. Meyer,et al.  Intermodulation distortion in current-commutating CMOS mixers , 2000, IEEE Journal of Solid-State Circuits.

[20]  Arthur van Roermund,et al.  A low-voltage folded-switching mixer in 0.18-μm CMOS , 2005 .

[21]  A.H.M. van Roermund,et al.  A low-voltage folded-switching mixer in 0.18-/spl mu/m CMOS , 2005, IEEE Journal of Solid-State Circuits.

[22]  Omid Shoaei,et al.  A High IIP2 Mixer Enhanced by a New Calibration Technique for Zero-IF Receivers , 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

[23]  Mohammad Yavari,et al.  Using interaction between two nonlinear systems to improve IIP3 in active mixers , 2014 .

[24]  F. Svelto,et al.  A 750 mV Fully Integrated Direct Conversion Receiver Front-End for GSM in 90-nm CMOS , 2007, IEEE Journal of Solid-State Circuits.