Concurrent and comparative fault simulation in SystemC and its application in robustness evaluation

[1]  P. Cochat,et al.  Et al , 2008, Archives de pediatrie : organe officiel de la Societe francaise de pediatrie.

[2]  Martin Radetzki,et al.  Efficient Fault Simulation of SystemC Designs , 2011, 2011 14th Euromicro Conference on Digital System Design.

[3]  Andrei Karatkevich,et al.  Concurrent simulation of concurrent discrete systems , 2009, 2009 10th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics.

[4]  Donatella Sciuto,et al.  Fault Models and Injection Strategies in SystemC Specifications , 2008, 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.

[5]  Bashir M. Al-Hashimi,et al.  SystemC-Based Minimum Intrusive Fault Injection Technique with Improved Fault Representation , 2008, 2008 14th IEEE International On-Line Testing Symposium.

[6]  Raimund Ubar,et al.  Code Coverage Analysis using High-Level Decision Diagrams , 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.

[7]  Luca Fossati,et al.  ReSP: A non-intrusive Transaction-Level Reflective MPSoC Simulation Platform for design space exploration , 2008, 2008 Asia and South Pacific Design Automation Conference.

[8]  Heinrich Theodor Vierhaus,et al.  Fault Injection Techniques and their Accelerated Simulation in SystemC , 2007, 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007).

[9]  I. Pomeranz,et al.  A Functional Fault Model with Implicit Fault Effect Propagation Requirements , 2006, 2006 15th Asian Test Symposium.

[10]  Laurent Capocchi,et al.  BFS-DEVS: A general DEVS-based formalism for behavioral fault simulation , 2006, Simul. Model. Pract. Theory.

[11]  Fabrizio Ferrandi,et al.  A Framework for the Functional Verification of SystemC Models , 2005, International Journal of Parallel Programming.

[12]  Laurent Capocchi,et al.  A DEVS-based Modeling Behavioral Fault Simulator for RT-Level Digital Circuits , 2004 .

[13]  Fabrizio Ferrandi,et al.  Error simulation based on the SystemC design description language , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[14]  Giovanni Squillero,et al.  New techniques for speeding-up fault-injection campaigns , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[15]  Raimund Ubar,et al.  Probabilistic analysis of CMOS physical defects in VLSI circuits for test coverage improvement , 2001, Microelectron. Reliab..

[16]  Franco Fummi,et al.  AMLETO: a multi-language environment for functional test generation , 2001, Proceedings International Test Conference 2001 (Cat. No.01CH37260).

[17]  Martin Radetzki,et al.  Robustheit nanoelektronischer Schaltungen und Systeme , 1997 .

[18]  Barry W. Johnson,et al.  A Fault Injection Technique for VHDL Behavioral-Level Models , 1996, IEEE Des. Test Comput..

[19]  Jean Arlat,et al.  Fault injection into VHDL models: the MEFISTO tool , 1994, Proceedings of IEEE 24th International Symposium on Fault- Tolerant Computing.

[20]  Paolo Prinetto,et al.  A new functional fault model for system-level descriptions , 1994, Proceedings of IEEE VLSI Test Symposium.

[21]  Vishwani D. Agrawal,et al.  Concurrent and comparative discrete event simulation , 1993 .

[22]  K. P. Lentz,et al.  Multiple-domain concurrent and comparative simulation , 1993, Proceedings ETC 93 Third European Test Conference.

[23]  Silvano Gai,et al.  Creator: general and efficient multilevel concurrent fault simulation , 1991, 28th ACM/IEEE Design Automation Conference.

[24]  Silvano Gai,et al.  The fault dropping problem in concurrent event driven simulation , 1990, Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

[25]  Sumit Ghosh,et al.  On behavior fault modeling for combinational digital designs , 1988, International Test Conference 1988 Proceeding@m_New Frontiers in Testing.

[26]  F. Somenzi,et al.  MOZART: a concurrent multilevel simulator , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[27]  Jacob A. Abraham,et al.  Algorithm-Based Fault Tolerance for Matrix Operations , 1984, IEEE Transactions on Computers.