Input- and output-monitoring in implicit and explicit memory

Previous experiments have shown that the procedure of questioning subjects retrospectively about the input and output status of information (input and output monitoring) is a useful method for assessing the awareness states of subjects during implicit and explicit memory tasks. The main purpose of the present study was to investigate whether the previous findings could be extended to other implicit and explicit memory tasks. We were especially interested in whether differences in input- and output-monitoring performance can be observed when both the implicit and explicit memory tasks are conceptual ones. In a final test phase, the target items from the study phase and new distractor items were presented. In a recognition-like situation, subjects had to decide whether an item had been presented in the study phase (input status), as well as whether they had produced the item in the memory-test phase (output status). In all three experiments judgments about the input status - but only for those items that had been produced in the implicit or in the explicit memory test - were more precise after explicit than after implicit memory testings. This finding was not influenced by the distinction between perceptual and conceptual-memory tasks (Exp. 1), and was obtained under conditions in which the implicit and the explicit memory tasks were both conceptual and differed only in test instructions (Exps. 2 and 3). These results suggest that not only subjects performing a perceptual test of implicit memory, but also subjects in a conceptual implicit test were less aware of using information from a previous study episode than subjects who received memory instructions. It is concluded that requiring judgments about the input status of information is a good method for assessing subjects′ test awareness and is preferable to the use of a questionnaire (Exp. 3). In contrast, in all three experiments no differences were found with the output-monitoring measure between implicit and explicit test conditions.

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