Multi-level equivalence in design transformation

This paper introduces the notion of multi-level equivalence in transformational synthesis of hardware or software. Two distinct, but interrelated levels of equivalence (behaviour and function-equivalence) are supported in this formalism. This would allow either or both the behaviour and functionality of the original function specification to be preserved during automatic synthesis which is typically based on a series of applications of equivalent transformation mechanisms. In essence, this formalism makes possible the evolution of behaviours while maintaining the functionality. This has extended the traditional view of synthesis through refinement to synthesis through exploration and evolution.

[1]  J. Darlington,et al.  Functional programming and its applications , 1982 .

[2]  Alice C. Parker,et al.  An Abstract Model of Behavior for Hardware Descriptions , 1983, IEEE Transactions on Computers.

[3]  D. J. Rees,et al.  Resources Restricted Global Scheduling , 1991, Conference on Advanced Research in VLSI.

[4]  Steven D. Johnson,et al.  Circuits and Systems: Implementing Communication with Streams , 1982, IMACS World Congress.

[5]  S. Thompson Functional programming: executable specifications and program transformations , 1989, IWSSD '89.

[6]  Robin Sharp,et al.  Transformational Rewriting with Ruby , 1993, CHDL.

[7]  K. Rath,et al.  Behavior tables: A basis for system representation and transformational system synthesis , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

[8]  Peter G. Harrison,et al.  A New Approach to Recursion Removal , 1992, Theor. Comput. Sci..

[9]  Shin'ichi Wakabayashi,et al.  A synthesis algorithm for pipelined data paths with conditional module sharing , 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

[10]  C. L. Liu,et al.  A scheduling algorithm for conditional resource sharing-a hierarchical reduction approach , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[11]  Keshab K. Parhi,et al.  Data-flow transformations for critical path time reduction in high-level DSP synthesis , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[12]  Mary Sheeran,et al.  muFP, a language for VLSI design , 1984, LFP '84.

[13]  J. W. Backus,et al.  Can programming be liberated from the von Neumann style , 1977 .

[14]  Santosh G. Abraham,et al.  Compiling Parallel Loops for High Performance Computers , 1993 .

[15]  Zhu Hong Program transformation by solving equations , 1991 .

[16]  Miodrag Potkonjak,et al.  Optimizing resource utilization using transformations , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[17]  Miodrag Potkonjak,et al.  Optimizing resource utilization using transformations , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

[18]  Ganesh Gopalakrishnan,et al.  A transformational approach to asynchronous high-level synthesis , 1993, VLSI.

[19]  Jonathan C. Shultis,et al.  Transformations of FP program schemes , 1981, FPCA '81.

[20]  Santosh G. Abraham,et al.  Compiling Parallel Loops for High Performance Computers: Partitioning, Data Assignment and Remapping , 1992 .

[21]  Krzysztof Kuchcinski,et al.  Automated transformation of algorithms into register-transfer level implementations , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[22]  G. Winskel The formal semantics of programming languages , 1993 .

[23]  Graham Reginald Hellestrand,et al.  A system for digital hardware description and simulation , 1981 .

[24]  Liang-Gee Chen,et al.  Rate-Optimal DSP Synthesis by Pipeline and Minimum Unfolding , 1993, The Sixth International Conference on VLSI Design.