Multiple clock domain clock synchronization method, wire card and Ethernet equipment

The invention discloses a multiple clock domain clock synchronization method, a wire card and Ethernet equipment. The method comprises the following steps: a sending wire card obtains M clock frequency differences which are determined through a receiving wire card, the M clock frequency differences of M uplink interfaces corresponding to M downlink interfaces of the sending wire card, and the M uplink interfaces are the M uplink interfaces of the receiving wire card. The M is a positive integer. Based on corresponding relation between the M downlink interfaces and the M uplink interfaces, the sending wire card uses each clock frequency difference of the M clock frequency differences of the M uplink interfaces to respectively adjust a sending clock of an interface corresponding to each clock frequency difference.