Heterogeneous redundancy for fault and defect tolerance with complexity independent area overhead
暂无分享,去创建一个
[1] Miodrag Potkonjak,et al. Behavioral-level synthesis of heterogeneous BISR reconfigurable ASIC's , 1998, IEEE Trans. Very Large Scale Integr. Syst..
[2] Jason Cong,et al. Acyclic Multi-Way Partitioning of Boolean Networks , 1994, 31st Design Automation Conference.
[3] Charles E. Stroud,et al. Dynamic fault tolerance in FPGAs via partial reconfiguration , 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).
[4] Melvin A. Breuer,et al. Roving Emulation as a Fault Detection Mechanism , 1986, IEEE Transactions on Computers.
[5] John Lach,et al. Designing, Scheduling, and Allocating Flexible Arithmetic Components , 2003, FPL.
[6] Charles E. Stroud,et al. Using roving STARs for on-line testing and diagnosis of FPGAs in fault-tolerant applications , 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).