Invariant-Strengthened Elimination of Dependent State Elements

This work presents a technology-independent synthesis optimization that is effective in reducing the total number of state elements of a design. It works by identifying and eliminating dependent state elements which may be expressed as functions of other registers. For scalability, we rely exclusively on SAT- based analysis in this process. To enable optimal identification of all dependent state elements, we integrate an inductive invariant generation framework. We introduce numerous techniques to heuristically enhance the reduction potential of our method, and experiments confirm that our approach is scalable and is able to reduce state element count by 12% on average in large industrial designs, even after other aggressive optimizations such as min- register retiming have been applied. The method is effective in simplifying later verification efforts.

[1]  Sharad Malik,et al.  Validating SAT solvers using an independent resolution-based checker: practical implementations and other applications , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[2]  Pavel Pudlák,et al.  Lower bounds for resolution and cutting plane proofs and monotone computations , 1997, Journal of Symbolic Logic.

[3]  Jason Baumgartner,et al.  Maximal Input Reduction of Sequential Netlists via Synergistic Reparameterization and Localization Strategies , 2005, CHARME.

[4]  Kenneth L. McMillan,et al.  Interpolation and SAT-Based Model Checking , 2003, CAV.

[5]  Robert K. Brayton,et al.  DAG-aware AIG rewriting: a fresh look at combinational logic synthesis , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[6]  Markus Wedler,et al.  Exploiting state encoding for invariant generation in induction-based property checking , 2004, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753).

[7]  C. A. J. van Eijk,et al.  Sequential Equivalence Checking Based on Structural Similarities , 2000 .

[8]  J. Baumgartner,et al.  Min-area retiming on flexible circuit structures , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[9]  G. Cabodi,et al.  Stepping Forward with Interpolants in Unbounded Model Checking , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.

[10]  William Craig,et al.  Linear reasoning. A new form of the Herbrand-Gentzen theorem , 1957, Journal of Symbolic Logic.

[11]  Jason Baumgartner,et al.  Scalable Automated Verification via Expert-System Guided Transformations , 2004, FMCAD.

[12]  Robert K. Brayton,et al.  MIS: A Multiple-Level Logic Optimization System , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[13]  Jie-Hong Roland Jiang,et al.  Scalable exploration of functional dependency by interpolation and incremental SAT solving , 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

[14]  Mike Case.  Inductively Finding a Reachable State Space Over-Approximation , 2005 .

[15]  Niklas Sörensson,et al.  Temporal induction by incremental SAT solving , 2003, BMC@CAV.

[16]  Robert K. Brayton,et al.  Functional Dependency for Verification Reduction , 2004, CAV.

[17]  Michael L. Case,et al.  Cut-Based Inductive Invariant Computation , 2008 .