Investigating the efficiency of cell level hardening techniques of single event transients via SMT

This paper presents a hierarchical framework to model, analyze, and estimate digital design vulnerability to soft errors due to Single Event Transients (SETs) based on Satisfiability Modulo Theories (SMTs). New strategies to mitigate SETs with minimum area overhead is proposed by selectively hardening vulnerable nodes in the design. The reliability of a circuit can be improved by 30% with less than 5% area overhead.

[1]  B. L. Bhuva,et al.  Reliability-Aware Synthesis of Combinational Logic With Minimal Performance Penalty , 2013, IEEE Transactions on Nuclear Science.

[2]  Mette Søgaard,et al.  Radiotherapy in patients with pacemakers and implantable cardioverter defibrillators: a literature review. , 2016, Europace : European pacing, arrhythmias, and cardiac electrophysiology : journal of the working groups on cardiac pacing, arrhythmias, and cardiac cellular electrophysiology of the European Society of Cardiology.

[3]  G. Wirth,et al.  Single Event Transients in Logic Circuits—Load and Propagation Induced Pulse Broadening , 2008, IEEE Transactions on Nuclear Science.

[4]  Yvon Savaria,et al.  New Insights Into the Single Event Transient Propagation Through Static and TSPC Logic , 2014, IEEE Transactions on Nuclear Science.

[5]  Yvon Savaria,et al.  Investigating the impact of propagation paths and re-convergent paths on the propagation induced pulse broadening , 2013, 2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS).

[6]  John P. Hayes,et al.  Enhancing design robustness with reliability-aware resynthesis and logic simulation , 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

[7]  Priyadarsan Patra,et al.  Observability-aware Directed Test Generation for Soft Errors and Crosstalk Faults , 2013, 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems.

[8]  Yvon Savaria,et al.  Characterizing, modeling, and analyzing soft error propagation in asynchronous and synchronous digital circuits , 2015, Microelectron. Reliab..

[9]  Yvon Savaria,et al.  Modeling, analyzing, and abstracting single event transient propagation at gate level , 2014, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS).

[10]  Nikolaj Bjørner,et al.  Z3: An Efficient SMT Solver , 2008, TACAS.

[11]  Yvon Savaria,et al.  Efficient and accurate analysis of Single Event Transients propagation using SMT-based techniques , 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[12]  Paul D. Franzon,et al.  FreePDK: An Open-Source Variation-Aware Design Kit , 2007, 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07).

[13]  Yvon Savaria,et al.  Abstracting Single Event Transient characteristics variations due to input patterns and fan-out , 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).