Implementation of Unbalanced Ternary Logic Gates with the Combination of Spintronic Memristor and CMOS

A memristor is a nanoscale electronic element that displays a threshold property, non-volatility, and variable conductivity. Its composite circuits are promising for the implementation of intelligence computation, especially for logic operations. In this paper, a flexible logic circuit composed of a spintronic memristor and complementary metal-oxide-semiconductor (CMOS) switches is proposed for the implementation of the basic unbalanced ternary logic gates, including the NAND, NOR, AND, and OR gates. Meanwhile, due to the participation of the memristor and CMOS, the proposed circuit has advantages in terms of non-volatility and load capacity. Furthermore, the input and output of the proposed logic are both constant voltages without signal degradation. All these three merits make the proposed circuit capable of realizing the cascaded logic functions. In order to demonstrate the validity and effectiveness of the entire work, series circuit simulations were carried out. The experimental results indicated that the proposed logic circuit has the potential to realize almost all basic ternary logic gates, and even some more complicated cascaded logic functions with a compact circuit construction, high efficiency, and good robustness.

[1]  J. Appenzeller,et al.  Comparing carbon nanotube transistors - the ideal choice: a novel tunneling device design , 2005, IEEE Transactions on Electron Devices.

[2]  Zhigang Zeng,et al.  Passivity analysis of delayed reaction-diffusion memristor-based neural networks , 2019, Neural Networks.

[3]  Bin Gao,et al.  Fully hardware-implemented memristor convolutional neural network , 2020, Nature.

[4]  Hai Helen Li,et al.  Spintronic Memristor Through Spin-Torque-Induced Magnetization Motion , 2009, IEEE Electron Device Letters.

[5]  Jawar Singh,et al.  Memristor based unbalanced ternary logic gates , 2016 .

[6]  R. Stanley Williams,et al.  A Family of Stateful Memristor Gates for Complete Cascading Logic , 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

[7]  N. Xu,et al.  Voltage-Controlled Skyrmion Memristor for Energy-Efficient Synapse Applications , 2019, IEEE Electron Device Letters.

[8]  Shukai Duan,et al.  Flexible memristor‐based LUC and its network integration for Boolean logic implementation , 2019, IET Nanodielectrics.

[9]  Peng Lin,et al.  Reinforcement learning with analogue memristor arrays , 2019, Nature Electronics.

[10]  R. Camley,et al.  Theory of giant magnetoresistance effects in magnetic layered structures with antiferromagnetic coupling. , 1989, Physical review letters.

[11]  J. Yang,et al.  Memristor crossbar arrays with 6-nm half-pitch and 2-nm critical dimension , 2018, Nature Nanotechnology.

[12]  L. Chua.  Memristor-The missing circuit element , 1971 .

[13]  Hassan Mostafa,et al.  An accurate model of domain-wall-based spintronic memristor , 2019, Integr..

[14]  Uri C. Weiser,et al.  MAGIC—Memristor-Aided Logic , 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

[15]  D. Stewart,et al.  The missing memristor found , 2008, Nature.

[16]  Andreas Antoniou,et al.  Low power dissipation MOS ternary logic family , 1984 .

[17]  M. Mitchell Waldrop,et al.  The chips are down for Moore’s law , 2016, Nature.

[18]  Ahmed Gomaa Radwan,et al.  Memristor-CNTFET based ternary logic gates , 2018, Microelectron. J..

[19]  L. Berger,et al.  Exchange interaction between ferromagnetic domain wall and electric current in very thin metallic films , 1984 .

[20]  Shukai Duan,et al.  Artificial and wearable albumen protein memristor arrays with integrated memory logic gate functionality , 2019, Materials Horizons.

[21]  Shukai Duan,et al.  A general memristor-based pulse coupled neural network with variable linking coefficient for multi-focus image fusion , 2018, Neurocomputing.

[22]  Earl E. Swartzlander,et al.  MAD Gates—Memristor Logic Design Using Driver Circuitry , 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

[23]  Donglian Qi,et al.  Hybrid dual-complementary metal-oxide-semiconductor/memristor synapse-based neural network with its applications in image super-resolution , 2019, IET Circuits Devices Syst..