Cooperating Virtual Memory and Write Buffer Management for Flash-Based Storage Systems
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[1] Liang Shi,et al. Cooperating Write Buffer Cache and Virtual Memory Management for Flash Memory Based Systems , 2011, 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium.
[2] Chia-Lin Yang,et al. Energy-Aware Flash Memory Management in Virtual Memory System , 2008 .
[3] Peiquan Jin,et al. CFDC: a flash-aware replacement policy for database buffer management , 2009, DaMoN '09.
[4] Nicholas Nethercote,et al. Valgrind: a framework for heavyweight dynamic binary instrumentation , 2007, PLDI '07.
[5] Zili Shao,et al. An endurance-enhanced Flash Translation Layer via reuse for NAND flash memory storage systems , 2011, 2011 Design, Automation & Test in Europe.
[6] Sooyong Kang,et al. LRU-WSR: integration of LRU and writes sequence reordering for flash memory , 2008, IEEE Transactions on Consumer Electronics.
[7] Jianhua Li,et al. ExLRU: A unified write buffer cache management for flash memory , 2011, 2011 Proceedings of the Ninth ACM International Conference on Embedded Software (EMSOFT).
[8] Tei-Wei Kuo,et al. An Adaptive Two-Level Management for the Flash Translation Layer in Embedded Systems , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.
[9] Tei-Wei Kuo,et al. An adaptive striping architecture for flash memory storage systems of embedded systems , 2002, Proceedings. Eighth IEEE Real-Time and Embedded Technology and Applications Symposium.
[10] Sang-Won Lee,et al. A log buffer-based flash translation layer using fully-associative sector translation , 2007, TECS.
[11] Rina Panigrahy,et al. Design Tradeoffs for SSD Performance , 2008, USENIX ATC.
[12] Jin-Soo Kim,et al. FAB: flash-aware buffer management policy for portable media players , 2006, IEEE Transactions on Consumer Electronics.
[13] Evangelos Eleftheriou,et al. Write amplification analysis in flash-based solid state drives , 2009, SYSTOR '09.
[14] Yiran Chen,et al. Emerging non-volatile memories: Opportunities and challenges , 2011, 2011 Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).
[15] Tei-Wei Kuo,et al. Special Issues in Flash , 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.
[16] Hyojun Kim,et al. BPLRU: A Buffer Management Scheme for Improving Random Writes in Flash Storage , 2008, FAST.
[17] Tei-Wei Kuo,et al. Efficient management for large-scale flash-memory storage systems with resource conservation , 2005, TOS.
[18] Dongkun Shin,et al. Recently-evicted-first buffer replacement policy for flash storage devices , 2008, IEEE Transactions on Consumer Electronics.
[19] Youngjae Kim,et al. DFTL: a flash translation layer employing demand-based selective caching of page-level address mappings , 2009, ASPLOS.
[20] Chun Jason Xue,et al. Register allocation for write activity minimization on non-volatile main memory , 2011, ASP-DAC 2011.
[21] Chun Jason Xue,et al. Register allocation for write activity minimization on non-volatile main memory , 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).
[22] Jianhua Li,et al. STT-RAM based energy-efficiency hybrid cache for CMPs , 2011, 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip.
[23] Wei-Che Tseng,et al. Write activity reduction on flash main memory via smart victim cache , 2010, GLSVLSI '10.
[24] Zili Shao,et al. MNFTL: An efficient flash translation layer for MLC NAND flash memory storage systems , 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).
[25] Peiquan Jin,et al. CCF-LRU: a new buffer replacement algorithm for flash memory , 2009, IEEE Transactions on Consumer Electronics.
[26] Sooyong Kang,et al. Performance Trade-Offs in Using NVRAM Write Buffer for Flash Memory-Based Storage Devices , 2009, IEEE Transactions on Computers.
[27] Sang Lyul Min,et al. A space-efficient flash translation layer for CompactFlash systems , 2002, IEEE Trans. Consumer Electron..
[28] Jianhua Li,et al. Exploiting set-level write non-uniformity for energy-efficient NVM-based hybrid cache , 2011, 2011 9th IEEE Symposium on Embedded Systems for Real-Time Multimedia.
[29] Alex Orailoglu,et al. Application specific non-volatile primary memory for embedded systems , 2008, CODES+ISSS '08.
[30] Seung Ryoul Maeng,et al. A buffer replacement algorithm exploiting multi-chip parallelism in solid state disks , 2009, CASES '09.
[31] Bingsheng He,et al. Operation-aware buffer management in flash-based systems , 2011, SIGMOD '11.
[32] Joonwon Lee,et al. CFLRU: a replacement algorithm for flash memory , 2006, CASES '06.
[33] Y.C. Chen,et al. Write Strategies for 2 and 4-bit Multi-Level Phase-Change Memory , 2007, 2007 IEEE International Electron Devices Meeting.
[34] Douglas Comer,et al. Ubiquitous B-Tree , 1979, CSUR.
[35] Meng Wang,et al. RNFTL: a reuse-aware NAND flash translation layer for flash memory , 2010, LCTES '10.