VLSI design of turbo decoder for integrated communication system-on-chip applications

A high-throughput low-power turbo decoder core has been developed for integrated communication system applications such as Digital Video Broadcast (DVB), satellite communications, wireless LAN, digital TV, cable modem, and xDSL systems. The turbo decoder is based on convolutional constituent codes, which outperform all other Forward Error Correction (FEC) techniques. This turbo decoder core is parameterizable and can be modified easily to fit any size for advanced communication system-on-chip products. The turbo decoder core provides FEC of up to 15 Mbit/s on a 0.13-micron CMOS FPGA prototyping chip at a power of 0.1 watt.