2-D DCT Algorithm Based on the Systolic Array and its VLSI Design

A 2-D DCT circuit design based on systolic array algorithm is proposed in this paper. In the circuit structure, the complex transfer memory is needless, but the architecture of parallel input and output is used, to complete N×N DCT transformations takes only N clock cycles, so that its throughput is N times as much as that of the traditional DCT. Such circuit structure has advantages of modularization, simple wiring and small chip size; it is well suitable for realization of VLSI.