Performance of a cyclic redundancy check and its interaction with a data scrambler

This paper covers four topics: 1) the operation and performance of cyclic redundancy checics (CRCs); 2) the shortest error patterns of various weights that are undetectable by the ANSI/IEEE-standard 32-bit CRC (CRC32); 3) the general interaction of data scramblers with CRCs; and 4) the specific problems that arise in ATM communication due to the interaction of the scrambler with the degree-10 CRC polynomial (CRC10). Elaborating 4), we explore the virtues of replacing CRC10 with CRC32 or with a degree-10 polynomial (P2055) that has no factors in common with the scrambler. Extensive results are presented concerning the capability of CRC10, P2055, and CRC32 to detect various error patterns.