Novel residue arithmetic processors for high speed digital signal processing

A novel class of multi-moduli residue number system (RNS) processors based on sets of forms {2/sup n1/-1,2/sup n1/+1,2/sup n2/-1,2/sup n2/+1,...,2/sup nL/-1,2/sup nL/+1} is presented. The moduli 2/sup ni/-1 and 2/sup ni/+1 are called conjugates of each other. The new RNS processors result in hardware-efficient 2-level implementations for the weighted-to-RNS and RNS-to-weighted conversions, achieve very large dynamic ranges and imply fast and efficient RNS processing. When compared to conventional processors of the same number of moduli and the same dynamic range, the proposed new processors offer the following benefits: (1) hardware savings of 25% to 40% for the weighted-to-RNS conversion, (2) a reduction of over 80% in the complexity of the final Chinese remainder theorem (CRT) involved in the RNS-to-weighted conversion.