SIMD and Array-Based Languages

This chapter describes the single instruction stream, multiple data stream (SIMD) and array-based languages. The SIMD programming model is based, conceptually, on the top-level hardware architecture shown. A single controller broadcasts instructions, one by one, to a large array of processors operating in slave-mode. It is found that whatever instruction is issued, all the processors execute in lock-step. The only exception to this is that certain processors may be put to sleep for a while, and during such periods, they are inactive and do not respond to the controllers directives. In addition to the instructions broadcast to the processor array, however, it is usually convenient to also have an ordinary scalar instruction stream executing on a conventional, sequential front-end processor. The idea is that some types of inherently sequential processing such as terminal I/O or loop tests are best executed using an ordinary sequential processor operating on ordinary sequential data structures. The instruction stream contains two types of instructions, which include those destined for the scalar, sequential part of the machine, and those destined for the processor array. These two types of instruction are interleaved, and one task of the controller is to route them to the appropriate part of the machine.