The goal of the research project that is presented in this paper, is the development of a mixed analog/digital silicon compiler. The compiler is targeted to the architectural design of a mixed analog/digital signal acquisition and processing chain for space applications. The user has to describe the functionality and performance requirements of a system to be de signed. The compiler then translates the system description into an architecture of low level modules such as A/D converters, amplifiers and filters, as well as digital control sections. The layouts of the different modules will be generated by dedicated analog or digital module generators. Finally, the compiler assembles the layout of the total system. The necessary verifications at different levels during the design process will be performed by a mixed signal simulator. The general requirements and design flow of the silicon compiler will be discussed, together with the application domain of the compiler.