论文信息 - Effects of capacitors non-idealities in un-even split-capacitor array SAR ADCs

Effects of capacitors non-idealities in un-even split-capacitor array SAR ADCs

This paper studies the effects of capacitors non-idealities in the performance of un-even split-capacitor SAR ADCs. Also, election of the m and l bits of MSB and LSB capacitors banks, respectively, is studied to reduce SAR errors. To exemplify and quantify the non-idealities, MOM capacitors are used. In particular, MOM layout parasitics and effective capacitors' value is obtained with an electrical extraction tool using a flattened view of the MOM. Effects of capacitors layout placement in the SAR and their surroundings in the effective capacitance value are quantified. A quantitative study of a 10-bit un-even split-capacitor SAR is done for different combinations of m and l bits. Finally, a qualitative set of guidelines to choose the distribution of these bits is listed.

Rafaella Fiorelli | Angel Rodriguez-Vazquez | Oscar Guerra | Rocio Del Rio

[1] Dmitry Osipov,et al. Behavioral model of split capacitor array DAC for use in SAR ADC design , 2012 .

[2] Alberto Rodríguez-Pérez,et al. Impact of parasitics on even symmetric split-capacitor arrays , 2013, Int. J. Circuit Theory Appl..

[3] Ieee Std,et al. IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters , 2011 .

[4] Ali Hajimiri,et al. Capacity limits and matching properties of integrated capacitors , 2002, IEEE J. Solid State Circuits.

[5] Sanroku Tsukamoto,et al. Split capacitor DAC mismatch calibration in successive approximation ADC , 2009, 2009 IEEE Custom Integrated Circuits Conference.

[6] Yong-Bin Kim,et al. A novel self-calibration scheme for 12-bit 50MS/s SAR ADC , 2014, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS).

[7] Wouter A. Serdijn,et al. Analysis of Power Consumption and Linearity in Capacitive Digital-to-Analog Converters Used in Successive Approximation ADCs , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

[8] Shahriar Mirabbasi,et al. A low-power 10-bit 50-MS/s SAR ADC using a parasitic-compensated split-capacitor DAC , 2012, 2012 IEEE International Symposium on Circuits and Systems.