High level analysis of trade-offs across different partitioning schemes for wireless applications

With the advent of heterogeneous MPSoC (Multi-Processors System-on-Chip) implementations of wireless applications, system partitioning and mapping has become a key challenge. To achieve efficient designs, system partitioning should simultaneously consider application characteristics, architecture constraints and physical design costs. It is also important to analyze the impact of partitioning on the system's area, energy and performance, as early as possible in the design flow. In this paper, we analyze the impact of different partitioning schemes for lattice reduction based MIMO detector. We show the trade-offs due to different partitioning schemes on area, energy and data parallelization factor for a given performance target for different number of processors. We carry out analysis based on high level estimates derived from the application and a set of characterized datapath and memory primitives for a template based architecture.

[1]  Liesbet Van der Perre,et al.  Mapping of 40 MHz MIMO SDM-OFDM Baseband Processing on Multi-Processor SDR Platform , 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.

[2]  Spiridon Nikolaidis,et al.  Zero-overhead loop controller that implements multimedia algorithms , 2005 .

[3]  Chantal Ykman-Couvreur,et al.  Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms , 2007 .

[4]  Joseph R. Cavallaro,et al.  Rapid Industrial Prototyping and SoC Design of 3G/4G Wireless Systems Using an HLS Methodology , 2006, EURASIP J. Embed. Syst..

[5]  Gregory W. Wornell,et al.  Lattice-reduction-aided detectors for MIMO communication systems , 2002, Global Telecommunications Conference, 2002. GLOBECOM '02. IEEE.

[6]  Kees van Berkel,et al.  Multi-core for mobile phones , 2009, DATE.

[7]  Greg Stitt.  Hardware/software partitioning with multi-version implementation exploration , 2008, GLSVLSI '08.

[8]  Jason Cong,et al.  Customizable Domain-Specific Computing , 2009, IEEE Design & Test of Computers.

[9]  Wai Ho Mow,et al.  Complex Lattice Reduction Algorithm for Low-Complexity Full-Diversity MIMO Detection , 2009, IEEE Transactions on Signal Processing.

[10]  Mohamed B. Abdelhalim,et al.  An integrated high-level hardware/software partitioning methodology , 2011, Des. Autom. Embed. Syst..

[11]  H. Bölcskei,et al.  MIMO-OFDM wireless systems: basics, perspectives, and challenges , 2006, IEEE Wireless Communications.

[12]  S. Baruah,et al.  Task partitioning upon heterogeneous multiprocessor platforms , 2004, Proceedings. RTAS 2004. 10th IEEE Real-Time and Embedded Technology and Applications Symposium, 2004..

[13]  Rainer Leupers,et al.  Customizable Embedded Processors: Design Technologies and Applications , 2006 .

[14]  E.G. Larsson,et al.  MIMO Detection Methods: How They Work [Lecture Notes] , 2009, IEEE Signal Processing Magazine.

[15]  Tughrul Arslan,et al.  Multicore Architectures With Dynamically Reconfigurable Array Processors for Wireless Broadband Technologies , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[16]  R. Shariat-Yazdi,et al.  Challenges in the Design of Next Generation WLAN Terminals , 2007, 2007 Canadian Conference on Electrical and Computer Engineering.

[17]  Min Li,et al.  Future Software-Defined Radio Platforms and Mapping Flows , 2010, IEEE Signal Processing Magazine.