An EPC Class-1 Generation-2 baseband processor for passive UHF RFID tag

Passive UHF RFID transponders (tags, in short) are mixed-signal Systems-on-Chip (SoCs) for remotely powered communications which must comply with stringent requirements on current consumption. This brief focuses on the design of a backend digital processor for UHF RFID tags targeting the Class-1 Generation- 2 EPC Protocol, and proposes different techniques for reducing its power consumption. After code validation with an FPGA, the processor has been synthetised in a 0.35µm CMOS technology process and occupies 7mm2 including pads. The design also incorporates a 10-b rail-to-rail SAR ADC for sensory applications. Under maximum digital activity conditions, post-layout simulations show that the power consumption of the processor below 2.8µW.

[1]  Martin Fischer,et al.  Fully integrated passive UHF RFID transponder IC with 16.7-μW minimum RF input power , 2003, IEEE J. Solid State Circuits.

[2]  Klaus Finkenzeller,et al.  Book Reviews: RFID Handbook: Fundamentals and Applications in Contactless Smart Cards and Identification, 2nd ed. , 2004, ACM Queue.

[3]  Daniel M. Dobkin,et al.  The RF in RFID: Passive UHF RFID in Practice , 2007 .

[4]  Zhihua Wang,et al.  A low-power RF front-end of passive UHF RFID transponders , 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

[5]  Catherine Dehollain,et al.  Design and Optimization of Passive UHF RFID Systems , 2006 .

[6]  A. Fotowat-Ahmady,et al.  A low power baseband processor for a dual mode UHF EPC Gen 2 RFID tag , 2008, 2008 3rd International Conference on Design and Technology of Integrated Systems in Nanoscale Era.

[7]  Andreas Wortmann,et al.  The impact of clock gating schemes on the power dissipation of synthesizable register files , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[8]  R. Weigel,et al.  Impact of the Local Oscillator on Baseband Processing in RFID Transponder , 2007, 2007 International Symposium on Signals, Systems and Electronics.

[9]  I. Velez,et al.  Power and energy optimization of the digital core of a Gen2 long range full passive RFID sensor tag , 2008, 2008 IEEE International Conference on RFID.