System on Chip with Hybrid Communication Architecture of On-Chip BUS and On-Chip Network

The present invention relates to one or more processors and a system-on-a-chip including various hardware communication module structure is controlled by the processor, System-on-chip of the invention and one or more processors that control the operation of hardware modules included in the system-on-chip, and at least one slave module operative receives the control of the processor of the hardware module, the slave of the above hardware module but the control module, and at least one master module that operates outside the control of the processor, and the on-chip bus to which a data communication path between the processor and the slave module, the data communication path between the master module and the slave module It comprises an on-chip network. System-on-chip according to the present invention has the effect that by a combination so as to have two data communication paths, to design a system of on-chip performance by making use of different communication paths according to the characteristics of the data transmission. System-on-chip processor, on-chip buses, an on-chip network