Observations Of Single-event Upset And Multiple-bit Upset In Non-hardened High-density SRAMs In The TOPEX/ Poseidon Orbit

habit observations of singleevent upset (SEU) and multiple-bit upset (MBU) activity in solid-state data recorders, comprising 256K-bit and 1M-bit commercial static RAMS, are presented for a pair of micro-satellites in the TOPEX/ Poseidon orbit (1320 km altitude, 66O inclination). Comparisons are made with similar devices flown on-board a micro-satellite in Sun-synchronous orbit (770 km altitude, 98O inclination). Ground-based testing of samples of the memory devices (including flight spares) has allowed the prediction of upset rates using standard models. The effectiveness of these techniques for predicting upset rates in large data recorders which utilise commercial memory devices is discussed. This paper presents an analysis of the SEU and Ml3U performance of these memory devices in the two orbits, and shows that for the higher orbit, double-bit upsets @BU) are observed to occur in both 1M-bit and 256K-bit devices. This finding is supported by observations of DBU in the 1M-bit devices under both proton and heavy-ion irradiation. We obsexve a surprisingly large variation in upset rate between devices of the same lot for one manufacturers' devices, both in orbit and under ground-test. This family also exhibits a strong bit-pattem sensitivity dependence, indicating that the sensitivity of a cell depends upon the electrical state of its neighbour.