A 12-bit SAR ADC with background self-calibration based on a MOSCAP-DAC with dynamic body-biasing

The vast majority of SAR ADCs on literature rely on very-linear capacitors to implement the DAC functionality. Still, if using the charge-sharing principle, a SAR ADC may employ MOS transistors used as capacitors (MOSCAPs) as DAC elements, benefiting from their higher capacitance density and broader availability. In this work, we exploit the body terminal of these MOSCAPs to adjust their capacitance and correct process mismatches. A background self-calibration scheme is presented and validated in a 12-bit 10 MSps SAR ADC. Post-layout simulations show that the algorithm is able to increase the effective-resolution of the ADC to 11.7 bits, in average. With a power consumption of 210 μW, the ADC achieves a figure of merit of 6.3 fJ/conversion-step. The presented ADC uses only 240 × 120 μm2 of active area, including the calibration logic. Still, the deterministic calibration algorithm converges in less than 30k conversions. The achieved results make the proposed architecture very competitive for the range of moderate-resolution moderate-speed ADCs.