An FPGA implementation and performance analysis between Radix-2 and Radix-4 of 4096 point FFT
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[1] Wayne Luk,et al. Reconfigurable computing: architectures and design methods , 2005 .
[2] Li Shang,et al. Dynamic power consumption in Virtex™-II FPGA family , 2002, FPGA '02.
[3] Muniandi Kannan,et al. A Survey on FFT/IFFT Processors for Next Generation Telecommunication Systems , 2018, J. Circuits Syst. Comput..
[4] Pei-Yun Tsai,et al. OFDM Baseband Receiver Design for Wireless Communications , 2007 .
[5] Abbes Amira,et al. FPGA implementations of fast Fourier transforms for real-time signal and image processing , 2005 .
[6] Jongsun Park,et al. Embedded DRAM-Based Memory Customization for Low-Cost FFT Processor Design , 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[7] J. Tukey,et al. An algorithm for the machine calculation of complex Fourier series , 1965 .
[8] Alan V. Oppenheim,et al. Discrete-time Signal Processing. Vol.2 , 2001 .
[9] R.W. Heath,et al. 60 GHz wireless communications: emerging requirements and design recommendations , 2007, IEEE Vehicular Technology Magazine.