A low-power MMSE MIMO detector using dynamic voltage wordlength scaling for 4×4 MIMO-OFDM systems
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[1] V. Strassen. Gaussian elimination is not optimal , 1969 .
[2] Resve A. Saleh,et al. Power-delay metrics revisited for 90 nm CMOS technology , 2005, Sixth international symposium on quality electronic design (isqed'05).
[3] Yoshikazu Miyanaga,et al. Use of a Variable Wordlength Technique in an OFDM Receiver to Reduce Energy Dissipation , 2007, 2007 IEEE International Symposium on Circuits and Systems.
[4] Yoshikazu Miyanaga,et al. Variable wordlength soft-decision Viterbi decoder for power-efficient wireless LAN , 2012, Integr..
[5] A. R. Newton,et al. Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas , 1990 .
[6] Amine Bermak,et al. Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.
[7] Yoshikazu Miyanaga,et al. Design of variable wordlength Viterbi decoder in BICM-OFDM systems , 2009, 2009 9th International Symposium on Communications and Information Technology.
[8] Abhijit Chatterjee,et al. Test Enabled Process Tuning for Adaptive Baseband OFDM Processor , 2008, 26th IEEE VLSI Test Symposium (vts 2008).
[9] Yoshikazu Miyanaga,et al. VLSI Implementation of a Complete Pipeline MMSE Detector for a 4 x 4 MIMO-OFDM Receiver , 2008, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..
[10] Andreas Peter Burg,et al. Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems , 2006, 2006 IEEE International Symposium on Circuits and Systems.