New Lower Bounds for Orthogonal Graph Drawings
暂无分享,去创建一个
[1] Frank Wagner,et al. The VLSI layout in various embedding models , 1990, WG.
[2] Ioannis G. Tollis,et al. Lower Bounds for Planar Orthogonal Drawings of Graphs , 1991, Inf. Process. Lett..
[3] Leslie G. Valiant,et al. Universality considerations in VLSI circuits , 1981, IEEE Transactions on Computers.
[4] Robert E. Tarjan,et al. Rectilinear planar layouts and bipolar orientations of planar graphs , 1986, Discret. Comput. Geom..
[5] Roberto Tamassia,et al. On the Compuational Complexity of Upward and Rectilinear Planarity Testing , 1994, Graph Drawing.
[6] F. Leighton. New lower bound techniques for VLSI , 1981, 22nd Annual Symposium on Foundations of Computer Science (sfcs 1981).
[7] Ioannis G. Tollis,et al. Planar grid embedding in linear time , 1989 .
[8] James A. Storer,et al. On minimal-node-cost planar embeddings , 1984, Networks.
[9] Goos Kant,et al. A Better Heuristic for Orthogonal Graph Drawings , 1994, ESA.
[10] Roberto Tamassia,et al. A unified approach to visibility representations of planar graphs , 1986, Discret. Comput. Geom..
[11] Goos Kant,et al. Drawing planar graphs using the lmc-ordering , 1992, Proceedings., 33rd Annual Symposium on Foundations of Computer Science.